1. Field of the Invention
The present invention relates to a substrate processing system and method for forming a predetermined pattern on a substrate by use of a photolithography technique.
2. Description of the Related Art
In the sequence of photolithography for manufacturing semiconductor devices, the following processes are sequentially performed to form a predetermined pattern on a target substrate, such as a semiconductor wafer (which will be referred to as “wafer” hereinafter). Specifically, a resist coating process is performed such that a coating liquid or resist liquid is applied onto the wafer to form a resist film. Then, a pre-baking process (PAB) is performed such that the wafer treated by the coating process undergoes a heat process. Then, a light exposure process is performed such that the resist film undergoes light exposure in accordance with a predetermined pattern. Then, a post-exposure baking process (PEB) is performed such that a chemical reaction is promoted in the resist film treated by the light exposure. Then, a developing process is performed such that the resist film treated by the light exposure is developed.
After the photolithography sequence, an etching process is performed by use of the resist pattern as a mask to etch an underlying film, such as oxide film, thereby forming a predetermined pattern.
Incidentally, a coating/developing apparatus used in recent years for executing such a photolithography sequence includes a plurality of modules for performing the same process, such as a baking or developing process, to increase the productivity. Similarly, an etching apparatus includes a plurality of chambers for performing the same etching.
With the arrangement described above, a plurality of wafers can be distributed to the equivalent modules and are processed in parallel, thereby improving the productivity.
However, such a coating/developing apparatus causes a problem in that, since modules for performing the same process have individual differences, some attributes of a resist pattern formed on wafers, such the line width (CD) and sidewall angle (SWA), are rendered uneven. For the same reason, the etching apparatus causes a problem in that some attributes, such as an etching bias, are rendered uneven.
In order to solve this problem, correcting means for removing fluctuations of pattern attributes is provided in each of the coating/developing apparatus and etching apparatus.
Jpn. Pat. Appln. KOKAI Publication No. 2007-110078 discloses a substrate processing system in which a correction value (offset value) for a heat process performed in a coating/developing apparatus is adjusted for a pattern attribute to approximate a target value.
In this respect, conventionally, a coating/developing apparatus is arranged to make a correction for a resist pattern attribute to approximate a predetermined value in all the modules. Further, an etching apparatus is arranged to make a correction for an attribute, such as an etching bias, to approximate a predetermined value in all the chambers. However, mutual relativity between the coating/developing apparatus (modules) and etching apparatus (chambers) is not considered.
Consequently, some pattern attributes are rendered uneven among the combinations of the modules of the coating/developing apparatus and the chambers of the etching apparatus. Part of the unevenness or fluctuations cannot be removed by individual correction in each of the modules or chambers, depending on the combinations.